1. Field of the Invention
The present invention relates to a method of reading data, and more particularly, to a method for reading input/output (I/O) port data.
2. Description of Related Art
In the current computer systems, the basic input/output system (BIOS) is triggered first for performing a complete diagnostic and testing procedure of the hardware equipment inside the computer when the user presses down the ‘Power On’ key. This diagnostic and testing procedure is commonly referred to as a power-on self test (POST). If the hardware equipment of the computer passes the diagnostic and testing procedure, the BIOS will transfer hardware information inside the computer to an operating system so that the operating system can continue with the startup procedure. However, if a certain component inside the computer functions abnormally, the startup procedure would be arrested at a certain stage and the computer would fail to start properly.
To speed up system development and debugging in the early days of computer system design, IBM has defined a special input/output (I/O) port for detection and debugging. The corresponding I/O address of this special I/O port is 80h. In a real application of the I/O port with 80h address, a plurality of power-on self test (POST) codes is first saved inside the BIOS with each code representing a different stage of the power-on self test. When the computer enters a particular stage of the power-on self test, the POST code representing this stage are transferred to the I/O port with the 80h address. Therefore, before the power-on procedure reaches the stage where the control is transferred to the operating system, any abnormal power-on condition can be traced back to the abnormality of a particular computer component by finding the code in I/O address 80h and looking up the detection stage corresponding to this code.
The foregoing POST code is displayed by sending to a group of light emitting diodes (LED) disposed on a motherboard or a debugging card so that an engineer can pinpoint the system component with the problem from the displayed code. In addition, the BIOS also tests the dual in line memory module (DIMM) and the fan after power on. If any errors are found, an error signal will be prompted and displayed through another group of LED.
FIG. 1 is a conventional power-on self test (POST) system structure. As shown in FIG. 1, the POST system 100 includes a super input/output (I/O) chip 110 and two serial/parallel converters 120 and 130, LED 140 corresponding to DIMM test failure, LED 150 corresponding to fan test failure, and LED 160 corresponding to the POST code of the I/O port 80h. After turning the computer on, a dual-in-line memory module (DIMM) test, a fan test, and a power-on self test are carried out respectively. The test results are transmitted as serial codes from the super I/O chip 110 to the serial/parallel converters 120 and 130 through input/output (I/O) ports GEX1 and GEX2. After the serial codes are converted to parallel codes through the serial/parallel converters 120 and 130, the outcome are shown through the LED 140 for displaying DIMM test failure, the LED 150 for displaying fan test failure, and the LED 160 for displaying I/O port 80h.
However, the super I/O chip has some practical limitations when executing the testing operation. For example, the NS427 super I/O chip developed by National Semiconductor Corporation has defined two modes of operation, namely, the direct I/O decoding mode and the general purpose I/O base (GPIO base) mode. Table 1 below makes a contrast between these two modes. As shown in FIG. 1 and Table 1, the direct I/O mode is used when the BIOS executes the POST. Under the direct I/O mode, the GEX1 and the GEX2 can only execute write operations. Furthermore, the GPIO base mode is used after executing the POST. Under the GPIO base mode, the GEX1 can execute write operations but the GEX2 cannot execute write/read operations.
TABLE 1StateModeGEX1GEX2BIOS POSTDirect I/OWritableWritableAfter BIOS POSTGPIO baseWritable/ReadableNo function
However, the foregoing direct I/O mode prevents the BIOS from obtaining the data from the GEX1 when the BIOS executes the POST or even after the operating system is taken over. Other software is also prevented from reading or using the data. Hence, without knowing whether the DIMM and the fan operate normally, it is possible that the control of the DIMM and the fan are continued, thereby causing a number of unpredictable problems